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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problem with SGDMA in ISR

I have a custom SOPC component that acquires 512 bytes of sample data and then signals to the Nios processor that the data is ready via its irq_n line. In the Nios ISR I call alt_avalon_sgdma_constru...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

This one will be tricky but when it runs into this stuck case maybe you can get some information back using Nios II or signal tap to see what state the DMA is in.

From the documentation for alt_avalon_sgdma_do_sync_transfer(): Available from ISR: Not recommended.

So I'm guessing you are running into a race condition if you are starting up the SGDMA from within the ISR.

Maybe the programming model of this SGDMA will be easier to handle in your system: http://www.alterawiki.com/wiki/modular_sgdma