Altera_Forum
Honored Contributor
20 years agoproblem with sdram
hi
i built my own board with a EP1C20 and flash and the sdram (MT48LC4M32B2 -7). i use the nios I and i don't manage to work properly with the sdram. When i write at the adress 0 i read the value at the adress 0x0 and 0x2 and 0x100 0x102 0x800 0x802 0x900 0x902 and 0x2000 and so on. I verified many tilmes all my pin out. the sdram is not close from the the FPGA. there is no influence when i change the phase shift of the sram_clk(50MHz). Is there a knew problem with sdram controler and nios I? I need some help!!!! thanks benjamin