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Altera_Forum
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16 years ago

Problem with SDRAM on DE2 board

I am using the Altera DE2 board (Cyclone II FPGA), Quartus 8.0 and Nios II IDE 8.0. I am having trouble using SDRAM in my design. Following are the details: 1. I have included a PLL component ...
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Altera_Forum
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15 years ago

What is the good timing for DE2 board? Because I set a lot of values and still I've got error with verifing data from sdram when I program NIOS.