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Altera_Forum's avatar
Altera_Forum
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12 years ago

Problem when downloading zImage to DE2-115 (cont.)

--- Quote Start --- This is jpe1313, What I was saying was that are any of your entries your generated *.dts file "unknown." Take a look. If they are "unknown" then it COULD be a problem....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Sorry, I don't know what you mean by "UP clocks".

I've just added the PLL and connected the clock output to the DRAM_CLK pin PIN_AE5 (from DE2-115.qsf file available in Terasic site). The SDRAM is working now. There only difference from your project is the Qsys file and the pin assignment. The pin assignment is shown below and the new Qsys file is attached. I've successfully run uCLinux and though I can't sent you my zImage I guess yours should work too. 


set_location_assignment PIN_AE5 -to DRAM_CLK

Please note that this design is far from good, it should at least have a SDC file. Though the design is now working, I want to make sure you understood what happened here so you can do it by yourself when you need.