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Altera_Forum
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19 years ago

Problem in using Avalon_Tristate_slave...

Hello, I am currently using " Altera Stratix 1S10 Development Kit". In SOPC Builder, I wanted to connect my User Logic to Nios Processor through Avalon_Tristate_slave. The Entity Inte...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

You don't really need burst.

You shall start with a simple component, with two slave ports.

One port s1 for output (from the view of CPU), and the other port s2 for input.

s1--> user logic --> s2

slave s1 pins: s1_writedata,s1_write,s1_waitrequest

slave s2 pins: s2_readdata,s2_read,s2_waitrequest

waitrequests are used for synchronize.

Then the component can be accessed by CPU or DMA.