Altera_Forum
Honored Contributor
11 years agoProblem in migrating design from Quartus 9.0 (SOPC) to 13.1 (Qsys)
Hi there,
I installed Quartus 13.1 (update 4) on a new Windows 8.1 PC and I'm trying to migrate some old designs created with Quartus 9.0 sp2 and SOPC builder. I had no problem in converting the fpga project and the sopc system to the new Qsys. I also imported the old Nios application and created the BSP project to replace the old syslib: like before, I used the SSS template with uC OSII and interniche stack. After minor effort everything compiled fine and I'm now able to configure fpga and download the application into the Nios processor. FPGA firmware is operational and so Nios seems to be, but my application hangs somewhere. I used the debugger feature and I discovered the code hangs in the alt_sys_init, generating an exception. From what I can understand, this happens as soon as the timer is initialized. Infact Nios crashes when I hit the macro call: ALTERA_AVALON_TIMER_INIT ( TIMER, timer) I also tried to insert code at the very beginning of the alt_sys_init function and this works, as long as I don't execute the following auto-generated initialization code. For example, I inserted a long loop where I toggle a PIO connected to a LED and I see the LED flashing. When the loop terminates and the regular part of alt_sys_init is executed, Nios crashes. Any ideas?