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Altera_Forum
Honored Contributor
20 years agoHi, VLorenzo and legendbb,
My component start working. When using IORD/IOWR, I sent more bits than defined in address. That seems causing problem. The IORD/IOWR lines are simply ignored. Would you please take a look at my latest question regarding order of registers in SOPC component. Thanks a lot, =============== new question ================ Hi, May be it is simple question, please confirm or answer: 1. When I created a SOPC component(6 bit address, 32b data), the SOPC alocate 0xFF length of 32 bit memory. 2. The order of all registers is the same as the order I claim register in verilog file. For example, the first claimed 32bit register has offset 0, the next one has offset 1. 3. What if I have the mix types of register, 1 bit or 8 bit or 32 bit. How could I know the actual offset from the base. Thanks, ==========================================