Problem debugging after bootloader loades

I added a small (8k will be more than enough) onchip RAM in SOPC builder and set the boot vector to the onchip memory.

Then I created a small NIOS application that have all the sections in the newly created onchip memory that would copy the content in my EPCS flash to my external SRAM. After that I would jump to the start address in the external memory. This is the boot loader. I then converted the .elf file from the boot loader to a hex file using the elf2hex utility. Used the hex file as the initialization file for my onchip memory. Rebuild the FPGA.

Then I created my real application for the NIOS. I set the reset vector to the internal memory and all the rest of the sections in the linker script to external SRAM. Debug this application as normal. Once you are happy convert the elf file to the format that the boot loader will read and make it a hex file. Program this hex file into the EPCS flash using the Quartus programmer tool.

We actually made the boot loader read elf files directly. This wastes a bit of space in the EPCS flash but we had plenty of room. It copies memory section by section to the external SRAM.

Hopefully this clarified some.