Forum Discussion
Got this problem resolved on my own,NOT thanks to any altera technical support (FAE/mySupport).After examining the schematics connection in Nios development board of the same Cypress type memory,i got suspicious.I could see that the connection isn't straightforward,i.e. address to address.After examining avalon bridge documentation:http://www.altera.com/literature/manual/mnl_avalon_spec.pdf i could see that for external device of 32-bit data width there is a different scheme of connection.The only thing that kept me from reaching the solution earlier is that i didn't connect ALL the pins and haven't set the memory size (2 MB) in SOPC properly.I should have probably got that from failing memory test at 0x80000.Anyhow it works now,and one important thing i have learned from this is to look closer at examples ,either from SOPC and also the schematics of evalution boards with similar hardware configuration.
Good day all, Michael