Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYou are on the right track, I always think it's better to start with something that is secure and that works well, before thinking about optimization for performance. Now you have a starting point and can try to get it better.
Now you can save one access by removing the "go" signal. Your component knows when the data is read, as you get a "read" signal on the Avalon Slave interface. You can use that to trigger the next value read. Without interrupts this is the best you can do for this kind of transfer. As I said with an iterrupt you wouldn't need the ready signal any more and could just wake up the CPU when new data is available, but it requires a bit more work on the software side. If you have a lot of data and want to transfer in efficiently to main memory, you should be looking for a DMA instead, such as Altera's SGDMA or the modular SGDMA available on the wiki. Then your component will just have to present the data on an Avalon Stream interface, and the DMA will take care of the rest.