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Altera_Forum
Honored Contributor
13 years agoAre you sure your setup will work? The Stratix IV Development board does not generate a 100MHz PCI output clock via its edge connector.
Can you create a PCIe RootPort without a 100MHz source? Or have you hacked the board to support it? --- Quote Start --- I have the Stratix IV dev. board, configured as RooPort, plugged into a chassis with a number of other PCIe boards with a PLX PCIe switch --- Quote End --- Are you sure the slot you have plugged the PCIe board into can be operated as a RootPort. I suspect its really just a slave port. U-Boot will have PCI enumeration source. Try building U-Boot for NIOS II. Linux also has enumeration support, so you could try NIOS II uCLinux or Linux. Cheers, Dave