OS on Cyclone 5 HPS without hard memory controller

Hi, for Cyclone V (FPGA side) you can choose to use "soft" memory controller IP (like the UniPHY IP). But even on chip with built in hard memory controller, you can choose to not use it, should you decide so. For Cyclone V HPS, yes the HPS portion has its own memory controller that is not shared with the FPGA.

The trick is that you can use the FPGA to access the memory controller in the HPS, via an interface called FPGA-to-SDRAM.

So to answer your question:

1. Yes

2. You can run Linux on the HPS without needing to use any IP cores in the FPGA, should you choose to.

3. Yes you can do this. Just make sure that you are connecting the pins correctly (the hard memory controller requires a fixed memory pin locations - so make sure you don't connect the memory to these location should you choose to use a soft controller)