Forum Discussion
Altera_Forum
Honored Contributor
19 years agoI believe the opencores 2.0 core is intended for ASIC implementation; it is impossible to achieve 480Mbps on Cyclone FPGAs; they don't have the appropriate transceivers.
I believe the opencores 2.0 core is intended for ASIC implementation; it is impossible to achieve 480Mbps on Cyclone FPGAs; they don't have the appropriate transceivers.