Altera_ForumHonored Contributor9 years agoOn-Chip Memory instruction corruption We have a design which uses a NIOS CPU whose instruction code is stored in On-Chip Memory. Most of the time everything works however there are times when the code is changed slightly and either the f...Show More
Altera_ForumHonored Contributor9 years agoTimequest say that there are timing violations? (Setup or hold time not met?)
Recent DiscussionsError generating BSPSolvedNIOS V/m dbg_reset_out signal (Q25.1 Std, MAX10)SolvedWhere is FreeRTOS-Plus-TCP DesignSolvedNIOS-V QSYS Warning Properties (associatedClock) have been set onSolvedDK-DEV-AGI027-RA: JTAG chain broken after Nios V Hello, FPGA recovery fails