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20 years ago --- Quote Start --- originally posted by svhb@Jan 4 2006, 09:46 AM is this a verilog design, maybe if you post it (or parts from it, i can understand better the situation.
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--- Quote End --- Thanks a lot for Nios Expert svhb's help. More detail about my problem will be: I instantiated On-Chip MEM (LPM_MEM, two port, Block Type: AUTO) in a hardware design. Then I have to use CPU to access the data which is sitting on the LPM_MEM. Planning to use DMA to move data from custom logic to SDRAM or UART. Currently I stuck at designing register file to let the LPM_MEM in the custom peripheral visible to Avalon bus. For general register accessing in custom peripheral I can simply use handcode. But my LPM_MEM is tens of thousand bytes large. So I guess there should be a smart way to solve. I did think about using a single register to map the memory ouput port then use extra logic to play memory data byte by byte to the bus. (Definitely a stupid design.) If the LPM address can be mapped to avalon bus just like SOPC builder assgined address. Accessing the whole LPM_MEM will be much more convenient. Thanks a lot, I'm still expecting help!