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Altera_Forum's avatar
Altera_Forum
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20 years ago

np_timersnapl doesn't change

Hi Friends!

I use the following program: 

#include <stdio.h># include "nios2_system.h"
int main (int argc, char* argv)
{
  np_timer* timer0=((np_timer*) na_high_res_timer);
  float r=0;
  long timePeriod = 33000; 
  timer0->np_timerperiodh = timePeriod >> 16; //Load the upper timer register with period right shifted by 16.
  timer0->np_timerperiodl = timePeriod & 0xffff; //Load the lower timer register with low 16 bits of period.
  timer0->np_timercontrol=0;
  timer0->np_timercontrol=timer0->np_timercontrol | np_timercontrol_start_mask;
  timer0->np_timercontrol=timer0->np_timercontrol | np_timercontrol_cont_mask;
  while(r<1)
  {
    if(timer0->np_timersnaph!=0)
      printf("np_timersnaph  =%d\n", timer0->np_timersnaph);
    if(timer0->np_timersnapl!=0)
      printf("np_timersnapl  =%d\n", timer0->np_timersnapl);
    r=r+0.000001;
  }
  
}

But np_timersnaph and np_timersnapl doesn&#39;t change their values.

What could be the reason?

Bye, Lothar.

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    I can not give you the answer. I just ask you, what do you want to do with the program?

    If you want to learn something about kernal and IO programming, read "linux device driver 3rd Ed".

    There is a chapter about timer. Read some codes in the kernal drivers will help too.

    If you want to learn about avalon peripherals, do it with HAL will be easier.

    The first timer in the system is used by kernel. And you should not touch it.

    Add a second timer to play with.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Hi Lothar,

    > What could be the reason?

    Here are some possibilities:

    1. The pointer is not correct (old/invalid header).

    2. "Readable snapshot" is not enabled.

    3. You have a data cache and the registers are never actually accessed.

    Regards,

    --Scott
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    I think it is not an cache problem. I assume he uses the peripheral adress which is defined in the nios2_system.h, so the peripheral access with such a structure will bypass data cache.

    Anyway, i would avoid accessing the peripheral with structure. just do it in the good old classic way: use outl and inl.

    so far i haven&#39;t tried your code...
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Hi Friend!

    The solution is a little bit curios.

    Before the value of np_timersnapl and np_timersnaph is available np_timersnapl or np_timersnaph has to be set with 0.

    I think, this setting with 0 effected that the register value of the timer is written to np_timersnapl and np_timersnaph.

    Thanks for your mindfulness, Lothar.