Altera_ForumHonored Contributor10 years agoNot able to interface SDRAM with nios Processor I have made a system with Nios processor, JTAG-UART, SDRAM(8MB), Clock Signal IP core, on chip memory. I am not able to implement the hello World Program. The nios console doesnt show anything except...Show More
Recent DiscussionsLPDDR4 not available in NIOSV/g linker script - Agilex-5, Quartus 26.1 ProNios V/m JTAG run‑control HALT fails — Debug Module healthy, hart never haltsNIOS II "Verify failed" for on-chip memory 128kTest PostError generating BSPSolved