New Contributoreclipse is not detecting any target connection and i downloaded .sof file in FPGA. i pressed several times refersh connections but it is not detecting. in my design niosii,clk with 24mhz,on chip mem,jtag uart and pio.iam using quartus ii 13.1 ver in windows 8,cyclone iii fpga and USB blaster ii. please help..
Frequent ContributorCheck the project folder if there is no .elf file that means there is an error stops the making of the .elf file, in this case please check the BSP settings and the memory size.
If there is an .elf file please check the JTAg speed configuration and try to reduce it via the following command :
jtagconfig --setparam 1 JtagClock 6M
please also watch the following video which is very useful:
https://www.google.com/search?rlz=1C1GGRV_enMY756MY757&sxsrf=ACYBGNT3hX9thOGE4P9e9sGZc_0nmdNZig%3A1568254388438&ei=tKl5XdepGsPTz7sP3uq4qAI&q=jtag+configuration&oq=jtag+configuration&gs_l=psy-ab.3..0j0i22i30l9.12124.13822..14102...0.4..0.73.523.8......0....1..gws-wiz.......0i71j35i39.umUdqQlFaBw&ved=0ahUKEwjX0_XtmsrkAhXD6XMBHV41DiUQ4dUDCAo&uact=5#kpvalbx=_w6l5XY_TF7_Wz7sP2ruNiAo26
Regards,
New Contributorthanku...above solution is perfect one....now i am able load .elf through emulator..
but while putting breakpoints it is not enabling and also stepinto also not working.
Frequent ContributorHi,
Thanks for your confirmation. Can you please elaborate more about the next error? What breakpoints you add?
If you are OK to open another thread to keep each question in a separate thread this will be much helpful to the other users in future to search for each error and find the solution.
I really appreciate your help to validate Intel solutions.
Regards.
