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Hi, you have succeeded in configuring your board with the right .sof.
Have you succeeded in downloading the software (
eclipse nios ii sbt> run as ...) ? No error messages like "verification failed between...."
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Hi mmTsuchi, Hany thanks for the input.
The .sof file I am loading has the date/time and name I would expect for the design I just compiled ( bts example ). So I believe it is the coffect .sof .
On occasions I got , the "Run Configurations" dialog box appeared which is mentioned on page 1-7 of the "My First Nios II Software Tutorial".
I clicked on Refresh then Run as indicated and the application is loaded and started. Then nothing on the console.
As I previoulsy mentioned , I believe the Blaster and Jtag communication myst be working since in Debug mode, I am able to step through code in the Eclipse debugger and it certainly looks like code to output a string.
This is why I suspect the JTAG_UART .. and there is mention of the possibility of the stdout being directed to a real UART but I don't see one in the design.
I may try to flash a LED ... if that works then the problem is JTAG_UART related I believe.
On Lauterbach they have "semihosting" which I believe may be a similar mechanism to the JTAG_UART .
Best Regards, Bob.
PS: I am surprised that with "Hello world" for the Arria V Starter Kit or any other kit, doesn't have a minimum FPGA design in the same spirit of "Hello world" being a minimum C program ie Nios II + Internal memory + JTAG_UART and an alive_led output . Such a minimum design may help first time users going since even the simple application here is non-trivial.
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