Honored Contributor
Honored Contributor<div class='quotetop'>QUOTE </div>
--- Quote Start --- So I think the problem is somewhere in my self-made nios2-system. May be, in the address map...[/b] --- Quote End --- A classical mistake is to have wrong setting in your nios-II's reset and exception vectors (a property of the nios core, not the address map. Its set in the cpu core): Reset should point to your flash where you eventually will have your nios image loaded. I your case, suppose your flash seen from nios core is at address flashBase=+0x0000.0000 you definitely would NOT want to have reset pointing into the zone where your fpga.sof is located (flashBase+0x0060.0000 and up to end of the fpga.sof image) You would have to find a suitable location in your flash for your nios image and point to that location as it will be seen from nios. Notice that it is often not sufficient to accept the defaults suggested by SOPC builder. You have to do som thinking here. The flash programmer will warn you of overlapping images, but not tell you what to do. Exception vector should point to your ram from where your program will run. In IDE system library properties set all addresses to ram locations where .text and .rodata is same ram as pointed to by Exception vector
