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Altera_Forum
Honored Contributor
21 years agoNios2/s to Nios2/f
When I converted to NIOS2/f from NIOS2/s I saw my network performance drop by 10X.
I am running uC/OS-II and LWIP on the Altera's Cyclone Development board. The code and FPGA are the same except the switch to NIOS2/f. It should not be a dcache issue, I disabled dcache using setting "always_bypass_dcache" to 1 in the ptf file used by SOPC builder. Does anyone have any Ideas?2 Replies
- Altera_Forum
Honored Contributor
The Nios II/f pipeline is optimized for hitting in the D-cache. If you disable the D-cache using always_bypass_dcache,
the Nios II/f takes one cycle longer than the Nios II/s to perform loads and stores. This could reduce your performance but I'm surprised it is being reduced 10X. BTW, the upcoming Nios II release has a better mechanism to disable the D-cache which also removes the extra cycle of penalty. The other difference between the two is that Nios II/f has dynamic branch prediction whereas Nios II/s has static branch prediction. Dynamic branch prediction tends to offer better performance for most applications. Maybe your application is an exception? Even still, I'd be surprised to see a 10X slow down. Do you need more performance than the Nios II/s provides or are you just sharing your surprise at the outcome of switching to a Nios II/f? - Altera_Forum
Honored Contributor
Thanks for your reply.
At first I had the dcache on and changed my malloc to be uncached. I saw the performance hit and thought maybe there was something else related to dcache so I turned it off. I am looking for more performance. My application would like to send vga images over the ethernet port at as close to 30F/s as can be done. With NIOS2/s, uC/OS-II, LWIP, a DMA, and a checksum module on a cyclone develpment board I have been able to get TCP up to 18Mbps and UDP up to 41 Mbps. I was hoping for alittle more with NIOS2/f.