Altera_Forum
Honored Contributor
8 years agoNios2/e Remote Upgrade in MAX10
Hi,
I am trying to implement a remote FPGA upgrade configuration using a MAX10 FPGA with NiosII/e. Nios is running from UFM of max10 (Not enough OCRAM left for nios). and small ocram for ISRs. Nios instruction masters keeps the on-chip flash IP always in read-busy. Therefore, I can't issue any command to erase or write the CFM of device for remote update. How can i stop instruction master from accessing flash. Why it does so even when executing exceptions? What i tried so far: - Added OCRAM for exception vector and added CFM ersae and write code in ISR -- Did'nt work - Ofcourse, running nios from OCRAM worked. But I cant run it in actual project due to limited resources. Looking forward to any suggestions.