nios2 processor non responsive

Also Mheng also faced a simiar issue (http://alteraforum.org/forum/showpost.php?p=123526&postcount=1)and he solved it by changing his timing requirements (http://alteraforum.org/forum/showpost.php?p=123535&postcount=3)

So how does one go about solving the timing requirements issue? I mean which component does one start with? Does one has to check clock skew first? (I used the PLL generated clock for all the components).

Ive used the standard components in my design (nothing custom).

I am going to read up about doing a timing analysis but I would like to know what to look out for as in what kind of a test bench does one need for this timing analysis?

Id be glad if someone could give me some pointers.