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Altera_Forum
Honored Contributor
14 years ago@Jab - U are propably right, but still its not up to the programmer to interpret jump directives, so still as for me, it should be the entry point (offset 0x0)
@Cris72 SDram base address is 0x0800000 NIOS CPU reset offset is 0x0 Interrupt vector offset is 0x20 in system.h the same values
# define
NIOS2_BIG_ENDIAN 0
#define
NIOS2_BREAK_ADDR 0x1000820
#define
NIOS2_CPU_FREQ 50000000u
#define
NIOS2_CPU_ID_SIZE 1
#define
NIOS2_CPU_ID_VALUE 0x0
#define
NIOS2_CPU_IMPLEMENTATION "tiny"
#define
NIOS2_DATA_ADDR_WIDTH 25
#define
NIOS2_DCACHE_LINE_SIZE 0
#define
NIOS2_DCACHE_LINE_SIZE_LOG2 0
#define
NIOS2_DCACHE_SIZE 0
#define
NIOS2_EXCEPTION_ADDR 0x800020
#define
NIOS2_FLUSHDA_SUPPORTED
#define
NIOS2_HARDWARE_DIVIDE_PRESENT 0
#define
NIOS2_HARDWARE_MULTIPLY_PRESENT 0
#define
NIOS2_HARDWARE_MULX_PRESENT 0
#define
NIOS2_HAS_DEBUG_CORE 1
#define
NIOS2_HAS_DEBUG_STUB
#define
NIOS2_HAS_JMPI_INSTRUCTION
#define
NIOS2_ICACHE_LINE_SIZE 0
#define
NIOS2_ICACHE_LINE_SIZE_LOG2 0
#define
NIOS2_ICACHE_SIZE 0
#define
NIOS2_INST_ADDR_WIDTH 25
#define
NIOS2_RESET_ADDR 0x800000
# define SDRAM_0_BASE 0x800000