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Altera_Forum
Honored Contributor
12 years agoYes i did as you said. But dont know how to fix .dts file. So i put here mine. Could you check and tell me what wrong is ?
root@F15:~/luclinux/sopc2dts# cat onur.dts /* * This devicetree is generated by sopc2dts on Fri Apr 19 16:30:38 EEST 2013 * Sopc2dts is written by Walter Goossens <waltergoossens@home.nl> * in cooperation with the nios2 community <Nios2-dev@sopc.et.ntust.edu.tw> */ /dts-v1/; / { model = "ALTR,onur"; compatible = "ALTR,onur"; # address-cells = < 1 >; # size-cells = < 1 >; cpus { # address-cells = < 1 >; # size-cells = < 0 >; cpu: cpu@0x0 { device_type = "cpu"; compatible = "ALTR,nios2-12.1"; reg = < 0x00000000 >; interrupt-controller; # interrupt-cells = < 1 >; clock-frequency = < 50000000 >; /* embeddedsw.CMacro.CPU_FREQ type NUMBER */ dcache-line-size = < 32 >; /* embeddedsw.CMacro.DCACHE_LINE_SIZE type NUMBER */ icache-line-size = < 32 >; /* embeddedsw.CMacro.ICACHE_LINE_SIZE type NUMBER */ dcache-size = < 2048 >; /* embeddedsw.CMacro.DCACHE_SIZE type NUMBER */ icache-size = < 4096 >; /* embeddedsw.CMacro.ICACHE_SIZE type NUMBER */ ALTR,implementation = "fast"; /* embeddedsw.CMacro.CPU_IMPLEMENTATION type STRING*/ ALTR,pid-num-bits = < 8 >; /* embeddedsw.CMacro.PROCESS_ID_NUM_BITS type NUMBER */ ALTR,tlb-num-ways = < 16 >; /* embeddedsw.CMacro.TLB_NUM_WAYS type NUMBER */ ALTR,tlb-num-entries = < 256 >; /* embeddedsw.CMacro.TLB_NUM_ENTRIES type NUMBER */ ALTR,tlb-ptr-sz = < 8 >; /* embeddedsw.CMacro.TLB_PTR_SZ type NUMBER */ ALTR,has-mul; /* embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT type NUMBER*/ ALTR,reset-addr = < 0xc0000000 >; /* embeddedsw.CMacro.RESET_ADDR type NUMBER */ ALTR,fast-tlb-miss-addr = < 0xc8001000 >; /* embeddedsw.CMacro.FAST_TLB_MISS_EXCEPTION_ADDR type NUMBER */ ALTR,exception-addr = < 0xc0000020 >; /* embeddedsw.CMacro.EXCEPTION_ADDR type NUMBER */ }; //end cpu@0x0 (cpu) }; //end cpus memory@0 { device_type = "memory"; reg = < 0x08001000 0x00000400 0x00000000 0x08000000 >; }; //end memory@0 sopc@0 { device_type = "soc"; ranges; # address-cells = < 1 >; # size-cells = < 1 >; compatible = "ALTR,avalon", "simple-bus"; bus-frequency = < 50000000 >; jtag: serial@0x8001440 { compatible = "ALTR,juart-12.1", "ALTR,juart-1.0"; reg = < 0x08001440 0x00000008 >; interrupt-parent = < &cpu >; interrupts = < 1 >; }; //end serial@0x8001440 (jtag) timer: timer@0x8001420 { compatible = "ALTR,timer-12.1", "ALTR,timer-1.0"; reg = < 0x08001420 0x00000020 >; interrupt-parent = < &cpu >; interrupts = < 0 >; clock-frequency = < 50000000 >; }; //end timer@0x8001420 (timer) }; //end sopc@0 chosen { bootargs = "debug console=ttyJ0,115200"; }; //end chosen }; //end /