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Honored Contributor
Honored ContributorNios2: DMA+FIFO
Hi everybody. I'm trying to transmit array from onchip memory through DMA to on chip FIFO and then read data from FIFO to another array. Parameters are as follows: fifo - depth=1024, dual clock mode,...
Altera_ForumHonored Contributor
Honored ContributorWith bursting enabled you are resticted to the transfer length being equal to the burst length, since you are using on-chip RAMs and FIFOs I don't recommend bursting. Which data width settings did you enable in the DMA? You are using 8-bit transfers but if you only enabled the 8-bit hardware you might need to enable 16 and 32-bit hardware as well (and just not use it that wide). I would explain that recommendation but I can't remember for the life of me what bug that worked around (and whether or not it was ever fixed).
Another bug you might be running into is in the driver. A long time ago I remember hitting a bug where if you logically OR'ed a bunch of flags together only one would stick. The workaround was to call the ioctl with one flag at a time. In your case you are probably setting the data width to 8-bit and setting RCON bit when reading from the FIFO (so that the address doesn't increment). In that case you'll need to call ioctl twice, once for the 8-bit flag and again for the RCON flag. If you end up hitting a wall with that DMA you might have an easier time using the DMA engine I created: http://www.alterawiki.com/wiki/modular_sgdma
