nios2 cyclone 2 problem

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originally posted by tantapion@Nov 6 2006, 07:56 AM

hi there

i am very new to the forum and hope anyone there could help.

i have designed a sopc component that seem to work well so far since i can read and write registers from c++(nios2) however whenever i try to change the value of my register from my verilog hdl code it does not seem to work as the value written with c++ (in nios2) keeps coming back. how do i fix that can anyone help please?

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Are you seeing the first access work but all other accesses fail? Chances are you are running into a cache coherency problem. Read page 131 out of 242 of this document to find out how to bypass the cache:

http://www.altera.com/literature/hb/nios2/n2sw_nii5v2.pdf (http://www.altera.com/literature/hb/nios2/n2sw_nii5v2.pdf)