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Altera_Forum
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10 years ago

nios2 + 8GB DDR3 /DDR3 SDRAM Controller with UniPHY

I'm trying to finish a simple test with a nios2/f + 1Mb on-chip memory + DDR3 controller. The DDR3 controller is connected to 8Gb DDR3 controller, which I took straight from the board manufacture...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Yes I did. I think the reason is because the NIOS ends up having a 32+ bit base address and qsys does not like it, even though NIOS itself wont use it.

I did that breakdown and encapsulated the 8GB memory into one qsys project and then created 8 x 1 Gb extenders with manual offsets, which were then exported for happy nioses to digest.

These were then joined through verilog/top. See attachments...

It seems to work...