NIOS with DDR as Main Memory

Very interesting!

To give you an idea of the application, I want to create very 3 large arrays of data. Each array needs to hold about 2,000,000 64 bit floating point numbers. Naturally, I am not able to use internal memory for this, even with the Stratix IV GX 230, there simply is not enough space.

As a result, I turned to the DDR as an output/storage device. I figured the easiest way would be to just connect the DDR to the processor and use it as the main memory. With this setup, I then create the gigantic arrays and use for loops to fill them sequentiall. However, it seems like the arrays are not being filled as burst transfers. So I though, maybe the compiler was not "optimizing" the transfers with respect to the memory and the burst nature of it.

Then, I tried another implementation that used an internal RAM, as well as the DDR, each connected to the CPU's data master. The internam RAM was connected to the CPU's reset and interupt vectors, as configured in the CPU's parameters in SOPC wizard.

When filling the arrays is there a way to direct the compiler/source code to burst the writes, or should this happen automatically? When I placed performance counters around the transfers, it seems to take more than 25,000,000 cycles to fill the arrays, even when I set the array size to 32768.