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Chris039's avatar
Chris039
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Nios V not working

Hi,

I am using example design created in

https://www.intel.com/content/www/us/en/docs/programmable/726952/22-1std-1-0-0/processor-example-design.html

I changed the loop from 1000 to 10 in main.c

The example design is working as below

After this, I add two avmm pipeline bridge in the platform designer and reassign base address, it gives me error below when downloading the elf file generated from Nios

Thanks

  • Hi,

    Yes, the application execution starts from on-chip RAM base address 0x0.


    Thank you.

    Regards,

    Kelly


16 Replies

  • Chris039's avatar
    Chris039
    Icon for Occasional Contributor rankOccasional Contributor

    I did not manually change the memory base address. When I add more component in the Qsys and assign the base address automatically using Qsys > System > Assign base address, the base address of the on chip ram changes automatically.

    How do I make sure it is working when Qsys assign address automatically to the on chip ram?

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor

    Hi,

    The "Assign Base Addresses" automatically assigns unique base addresses to all the slave interfaces/ports in the Qsys Pro system to avoid conflicts in the system for all memory-mapped component interfaces.

    If the master does not have enough address space for its slaves, then no amount of assigning base addressing would work. The user is expected to modify their master/slaves to ensure proper sizing is used. It is not guaranteed that "Assign Base Address" would solve addressing problems.


    Thank you.

    Regards,

    Kelly


  • Chris039's avatar
    Chris039
    Icon for Occasional Contributor rankOccasional Contributor

    May I confirm again that the on chip memory start address for Nios V must start from 0x0?

    I have this concern is because the Nios II just work with any value as the start adresss.

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor

    Hi,

    Yes, the application execution starts from on-chip RAM base address 0x0.


    Thank you.

    Regards,

    Kelly


  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor

    Hi Chris,

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


    Thank you.

    Regards,

    Kelly Jialin, GOH