Forum Discussion
Altera_Forum
Honored Contributor
21 years agoMy example was stripped down to isolate the behavior. My real code does clear the interrupt condition inside the ISR, and it does exhibit the masking behavior whether I use printf or not.
I thought that the system ISRs (spurious, CWP overflow, etc) all used high priority IRQ#s below 16. All my user ISR#s are above these and above the uart IRQ#s, and so should not be blocked. Do you mean that I have to do a nr_setirqenable(1); inside my user ISR to allow even higher priority ISRs? Where do I look to see the IRQ# for this timer? Thanks