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Altera_Forum
Honored Contributor
14 years agoI started with a design that just contained the block the SOPC builder created, fed by a clock running at 40 MHz. With this I could communicate via USB cable and send commands.
I needed to add a pseudo-random bit stream running at 400 Mbps so I took a second clock and fed it into a PLL to produce a 400 MHz clock. I then fed this into a linear feedback shift register and output to a LEMO pin. I have not added any timing constraints as this has never been as issue, is this important for a design to function correctly? I am a novice and I hoped I could add this bit stream next to the Nios system without affecting it. At the moment I can either communicate with the Nios CPU and have a slow bit stream, or get the Nios CPU error and have a fast bit stream.