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Honored Contributor
Honored ContributorNIOS not reading the right FIFO value
Hello guys, i made a 32bits DCFIFO using the megawizard. I made this wrapper to increment the fifo value by each second (my fifo is running at 50mhz) begin
contador <= contador +...
Altera_ForumHonored Contributor
Honored ContributorFirst your read and write clocks should be your system clock, and you should just use the rdreq and wrreq signals to control the fifo read and writes. Using generated signals as clock can lead to problems such as extra clock cycles due to glitches.
Then it seems that each read that you do from the software is creating two read cycles on the fifo. Could you show us your HDL code that reads from the FIFO? You can also use signaltap probes on your component to see what is going on.
