NIOS is constantly reading from instruction memory and reading/writing to data memory

There is no instruction that could stop a Nios. Nios will always fetch instructions from its instruction memory and it is not instruction dependent at all.

I am concern that the data_bridge will not work since it is exported as nios_mm. From your diagram, is it true that data master is connected to data_mem and data_bridge only? I would advice to move your custom component into the Qsys and either connect that directly to Nios data master or connect it to the data_bridge.

Let me try to explain.

Bridges in Qsys is transparent to Nios. Nios master interfaces (instruction/data masters) see through bridges. Therefore, once you exported the m0 interface of the bridges just like what you are doing with the data_bridge, Nios sees nothing at all and will ignore the bridge. What happen here is that Nios will not be able to address whatever that is at the bridge.

If you open your sopcinfo, look for dataSlaveMapParam, under the value column you should see all the connected slave to the data master. I bet you will just see the data_mem.

If you want to workaround this, you can try to add a dummy component in Qsys, such as another memory and place them in this order:

1. data_mem 0x0_0000 - 0x0_ffff

2. data_bridge 0x1_0000 - 0x1_ffff

3. dummy_ram 0x2_0000 - 0x2_ffff

This would allow the effective addressable range of the data master to be from 0x0 to 0x2_ffff. Else without the dummy ram the data master can address only between 0x0 - 0xffff (as in the dataSlaveMapParam), which will ignore your data bridge. Do note that the addresses are just for references. You do not need to follow them, but the order is important.

Hope this helps.