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Altera_Forum
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18 years ago

NIOS inb does 4 byte accesses to UART

I'm using the OpenCores 16550 UART and found the NIOS processor does 4 sequential byte accesses when I read a single byte. I've setup the serial.h file to use UPIO_PORT so that eventually calls inb from serial_in.

I've traced the UART accesses with Signal Tap and I see 4 sequential accesses for each inb call (i.e. inb(addr + 1) will read from addr+0, addr+1, addr+2, and addr+3).

outb works fine and does a single byte write as expected.

Setting the MSB address bit to bypass cache had no effect. Also using a volatile char ptr yields the same results as inb accesses.

We have the UART working fine in the same FPGA when it is connected to an external master which can do byte accesses to the Avalon Bus. In this setup there is no NIOS and I can send and receive a single byte of data as expected.

The UART address space shows up as 8 bytes in both instances.

Any ideas why the NIOS turns a single byte read into 4 but an external master does not?

Thanks,

Stefan

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    I seem to have isolated the cause, but I don't fully understand the reason. The UART SOPC Builder module was originally setup for Dynamic (Memory) mode for another project which needed the UART registers to take up only 8 bytes. In this mode single byte NIOS reads get translated into 4 byte reads of the corresponding LWord. Reading a single byte from an external (to the FPGA) Master works just fine.

    I created a new SOPC Component with Native (Register) mode which then increased the UART register space to 32 bytes. I changed the register shift to 2 in the serial.h file and this corrects the problem and the UARTS work fine. I only see a single byte accesses to the UART as expected.

    I still don't understand why reading a single byte from a Dynamic Memory from the NIOS processor gets translated into reading all 4 bytes of the corresponding LWord. It appears that the NIOS treats Dynamic and Native address spaces differently.

    It's annoying to have two nearly identical components, but I guess that's what I am stuck with.

    Stefan