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Altera_Forum
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12 years ago

Nios II with on-chip Dual port ram between Nios and External DSP

Hello, I'd like to implement a dual port ram using on chip memory, with one side connected to the Avalon bus and other connected to an external DSP. Not sure where to get started; I can not se...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Hello,

I've attached a screen shot showing the Qsys configuration and schematic; if possible, can you perhaps confirm if what I have shown is what was suggested?

Thank you and best regards,

Scott

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Yes, its correct!

Did You manage to connect External DSP to the exported second (s1) port of the dual port RAM?

If Yes , the please answer:

1). why Write signal is present, but the Read signal is missing on the exported second (s1) port of the dual port RAM?

2). Is Write really is WriteEnable?

3). how to use clken ( clock enable ) on the exported second (s1) port of the dual port RAM?