Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorNIOS II SPI multiple slave environment
Hi all, I am trying to communicate to multiple SPI slaves (ADC and a DAC) using Altera DE2 board as SPI Master for 8 bit transfer and 2 slaves SS_n[0] and SS_n[1] in SOPC builder. In the NIOS I...
Altera_ForumHonored Contributor
Honored ContributorThere could be a number of reasons causing your problem.
As you said, SCLK and SS signals seem to be correct, but you should capture MISO and MOSI as well: check if they comply with ADC and DAC specification. Also check if you are using correct settings for clock polarity and phase.
