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...Another concern is how the processor will be reset. The reset vector is set to the EPCS controller base address within QSYS. However, will the SBT Run Configuration reset to the base of the on-chip RAM?...
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Inside SOPC builder GUI (Q11.1 SP2) it appears there is no way to set the reset vector to the EPCS base address. Epcs is absent in the reset vector pull-down menu of the NIOS II processor.
In Qsys it seems to be possible but
only by entering the
absolute address of the EPCS flash "manually". Not by menu selection. This lack of pull-down menu selection does make me suspicious as to the validity of the method.
is setting reset=absolute base address of the epcs (a part of) the way to direct nios to boot from the epcs flash it in qsys? Thanks for hints.
And out of curiosity - because I'm switched to Qsys now - how would you possibly do this in SOPC builder?
Honored Contributor
