Forum Discussion
Altera_Forum
Honored Contributor
12 years agoThanks for your reply.
I've set up signal tap to try trigger on write (Compiling now). I'm using: # define IOWR(base,offset,value) __builtin_stwio ((unsigned int*)BASE + OFFSET, (DATA)); IOWR(I2C_MASTER_BASE, 5, 0x1D); to write to the registers which I think is working because it works fine for some registers and with simple PIO tasks. I am confident that 0x9866160 is the correct address as it is taken from the SOPC builder and based on the fact that when I initiate values into the registers in the VHDL I can see them at this address in the debug window. I am sure the FPGA is configured in the correct order as I've been working on it for several days now so it's been programmed many times now. However, I am re-compiling right now so will make 100% sure the order is correct. Thanks for your time, i'll update the situation when I see if I can trigger on write.