Forum Discussion
Altera_Forum
Honored Contributor
12 years agoIn signaltap you should be able to trigger on the "write" signal.
Could you show us the code you are using to write to the registers? Are you sure that 9866160 (in hexadecimal) is the correct base address? Is the FPGA configured with the correct .sof image (i.e. did you, in that order, generate the SOPC system, compile the Quartus project and upload the .sof image to the FPGA before doing the test?)