Honored Contributor
Honored ContributorI would like to make one cautionary comment with regards to turning clocks off: Yes, it will save power. However, there are three things you should note:
(1) If you are interfacing to external synchronous memory (SDRAM) you'll want the Altera SDRAM controller to continue to operate unless you don't care about the contents of SDRAM (refresh!). (2) If you are interfacing to external memory and some other device wishes to access that memory, be careful. If you turn "off" Nios/Avalon clocks as they are accessing that memory you won't be able to access it with some other device (bus contention, avalon arbitration, etc.). (3) If you need to use any JTAG functionality associated with Nios, there is a minimum clock frequency (4x the JTAG Tck rate I believe, which can be as high as 10MHz). This isn't a factor if your final system doesn't need live-debugging or the JTAG UART. .... so be careful if you stop that clock. A safer bet might be to slow down the clock, but you'll still need to ensure that any external memory that needs refresh is handled properly.
