Honored Contributor
Honored Contributorjdhar,
If your chip does not have the room for SignalTap, you can try a smaller system test to verify what is going on. Since Avalon is a fully synchrounous switch fabric, it should be easy to add and subtract components. I would suggest to make a copy of your design and take out non-essential components to give yourself some extra resouces for SignalTap memory storage and more routing tracks for the LogicAnalyzer to probe internal signals. By shrinking your system down you can then chose some of the fast compile options in Quartus II and turn off some of the performance vs area tradeoffs. Also smart recompile and incremental compilation has an impact on compilation time - I would suggest to read up on those features. Also not having a lot of memory makes windows swap to the disk a lot and really slows down compilation. Regards, -ATJ
