Honored Contributor
Honored ContributorI've neglected "my" thread a bit...
Thanks for the answers. Indeed I wasn't talking about a wait loop, but an instruction to suspend the CPU while waiting for an interrupt, to save power and all the traffic that goes along with instruction fetching. For example, imagine a system with a cacheless Nios /e, running from an external RAM. When e.g. kicking off a DMA transfer to copy stuff around that RAM, and waiting for it to finish, the CPU would obstruct the DMA a lot because it fetches instructions from the same memory all the time. @dsl: Personally, my embedded code style is the opposite, I tend to avoid polling and use interrupt whereever possible, sleeping sometimes pretty deep while waiting for them. (Maybe because I've done low power systems living from button cells or harvested energy.) But even if not, I don't like systems that eat up all resources. Stalling in a multi-cycle custom sleep instruction seems to me like an elegant way to implement. But what's the condition to end the stall? Is there a convenient way to access the interrupt condition? Jörg PS: For me, the subject is currently academic, in my current system I have caches, but I felt something is missing for the Nios...
