Nios II has no sleep/idle/wfi instruction?

Personally (on embedded systems) I tend to not use interrupts and just poll what would be the interrupt sources directly.

I will use interrupts for anything that is really timing critical, but a hardware buffer will usually solve the problem.

There are various ways to force an instruction pipeline stall, they might lead to very slightly lower power consumption, but it is unlikely to be measurable unless you have no instruction cache and are reading instrcutions from SDRAM (which will be very, very, very slow at the best of times).

1) Stall a multi-cycle custom instruction.

2) Stall an Avalon read to a specific slave - accesses to other slaves won't be affected.

During the latter I know that the 'clock enable' of tightly coupled data memory is deasserted which might reduce power marginally.