Nios II fast pipeline

What do you mean ?

I believe that the 'A' and 'B' fields of all instructions (except call and jmp) cause two 32bit values to be read from the register file during the 'decode' phase (often r0 is read when no value is required).

Either of these can cause a pipeline stall if the required value was written by a non-ALU instruction. Something must forward the result from the ALU to avoid this stall.