Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- If you are using a time limited .sof, you should have a window opening just after you configured the FPGA, saying that you are running in Opencore evaluation mode. Do you close that window? If you do then the CPU stops working. You need to keep that window open when you use the IDE. --- Quote End --- Thanks for helping me. I did what you said but I still get the same results even after refreshing many times. I read another case that had the same problem: http://www.alteraforum.com/forum/showthread.php?t=37386 What is puzzling me is why Altera put the option of skipping the ID and TimeStamp verification and why the refresh? is it because it is a common problem? I am really stuck now:(