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Altera_Forum
Honored Contributor
Honored Contributornios ii doesn't run hello world (or sometimes not correctly)
Hi Guys, i have a problem with the niosii. I use a Altera Cyclone IV EP4CE22E22C8N on a selfmade board. The board now only contains a 60MHz Clock, the fpga and a sdram. The Reset and exception...
Altera_ForumHonored Contributor
Honored ContributorI have seen similar issue with de0-nano that the hello world does not run properly. It was due to timing issue with the SDRAM.
ftp://ftp.altera.com/up/pub/altera_material/11.0/tutorials/verilog/de0-nano/using_the_sdram.pdf There is some kind of known clock skew issue with the board and the fix was to add a SDRAM_CLK that leads the NIOS_CLK by 3ns (more explanation in the reference, section 7). I am not sure the 3ns applicable to your case. But you can try.
