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Altera_Forum
Honored Contributor
Honored ContributorNios II Building Error
I got this error when building a Nios II project. Please help me fix it. :)
alt_sys_init.c:(.text+0x8): warning: Error: Interrupt not connected for JTAG_UART. You have selected the interrup...
Altera_ForumHonored Contributor
Honored ContributorIt looks like the FPGA configuration you have doesn't correspond to the SOPC definition that the BSP used to compile the software. Be sure that you have the right configuration.
You can follow those steps each time you modify the SOPC project:[list][*]save SOPC project and generate it[*]compile the hardware project in Quartus[*]open the Nios IDE, check that it's pointing to the right .sopcinfo file[*]compile the software project[*]upload the correct .sof file to the FPGA (careful! if you are using IP cores without their license, the file could be a *_time_limited.sof instead of the regular one)[*]upload the software[/list]
