Nios II and separate WRITE_N signal to CFI Flash

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originally posted by pszemol@Mar 6 2006, 11:15 PM

my question is: why "write_n_to_the_flash" signal is not shared with the rest of the write_n signals. in other words, why do i have separate write_n signal instead using mem_bus_readn/mem_bus_writen signals for both sram and flash ?

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The SOPC builder CFI Flash declares the write signal as not shared signal.

In fact, if you open the system ptf you should find somethig like:

MODULE FLASH

{

...

PORT_WIRING

{

...

PORT write_n

{

width = "1";

is_shared = "0";

direction = "input";

type = "write_n";

}

So SOPC Builder generates one write signal for the SRAM (mem_bus_writen - shared bus signal) and one for the FLASH (write_n_to_the_FLASH - not shared).

As this is not modifiable in the GUI, you could manually edit the ptf, putting

is_shared = "1";

to have a single, shared, write signal.

Hope this helps.