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Honored ContributorNIOS II 32 bit data master -> Avalon MM PCIe 64 bit TX slave
I had a system working where the DMA controller ( 64 bit ) was reading and writing to the TX port of the PCIe TX port . I now have a situation where I want the NIOS II data master ( 32 bit ) to r...
Altera_ForumHonored Contributor
Honored Contributor900ns wouldn't surprise me.
Single transfers into the fpga are similarly slow (IIRC 600-700ns when running the FPGA at 100MHz). PCIe is a high-throughput high-latency 'bus' and isn't really suitable for PIO accesses. I've not timed transfers into other PCIe slaves to see how slow they are, but they won't be fast. The elapsed times are slow because PCIe is a comms protocol, not a bus protocol. So even for relatively low throughput you need a dma controller to request single PCIe transfers for upto 128 bytes (typically the limit for a single transfer).
